Low-Power IoT Edge Amplifier with Reconfigurable Filter Core

Thesis Abstract

In the rapidly expanding domain of Internet of Things (IoT), edge devices must deliver reliable signal processing while minimizing power consumption and maintaining adaptability to diverse sensing environments; existing edge amplifiers often sacrifice either energy efficiency or filter configurability, leading to degraded performance in low-power deployments. This study addresses the design, implementation, and evaluation of a Low-Power IoT Edge Amplifier with a Reconfigurable Filter Core (RFFC) capable of dynamic gain control and programmable, spectrum-aware filtering to optimize signal integrity under stringent power budgets. The aim is to develop an integrated amplifier-front-end architecture that (i) achieves sub-1.2 mW continuous operation at 2.4 GHz sensing bandwidths, (ii) supports real-time reconfiguration of filter parameters (center frequency, bandwidth, and type) via a lightweight control interface, and (iii) provides robust performance under process, voltage, and temperature variations. Specific objectives include (1) deriving a compact analog-digital hybrid amplifier topology with a reconfigurable finite-impulse-response (FIR) filter core implemented in a low-power 65-nm CMOS process; (2) formulating a power-aware design methodology incorporating adaptive biasing and clock-gating to meet a target figure of merit (FOM) defined as fUS = SNR × (1/Power) for typical IoT sensing channels; (3) validating the RFFC through hardware prototyping on a 4-channel sensor node and a 1.8 V supply, with a target endurance of 10,000 hours in high-temperature operation; (4) evaluating the system under communications-relevant interference profiles using realistic industrial and environmental signal models; and (5) benchmarking against state-of-the-art edge amplifiers and fixed-filter implementations. The methodology adopts a design-centric research approach with iterative hardware-in-the-loop validation. A mixed-methods evaluation combines quantitative measurements from fabricated test chips and simulations with qualitative assessments of configurability usability in firmware. The population comprises IoT sensor nodes deployed in laboratory, outdoor, and industrial testbeds. A sample of 12 device instances is used for statistical validation, with 8 devices reserved for long-term reliability testing. Data collection instruments include calibrated vector signal analyzers, spectrum analyzers, low-power current meters, and a custom firmware suite enabling dynamic reconfiguration of filter cores. The data analysis employs regression analysis to quantify the relationship between filter reconfiguration, power consumption, and SNR; ANOVA is used to assess performance differences across filter configurations and environmental conditions; and nonparametric methods verify robustness where sample sizes limit parametric assumptions. Theoretical grounding draws on the Theory of Signal Processing and the Energy-Consumption Model for Low-Power Electronics, with the design guided by Chebyshev and windowed-sinc filter design principles for the reconfigurable core. Key expected findings include (i) a demonstrable reduction in total power consumption by at least 25% compared with fixed-filter edge amplifiers for comparable SNR in multi-sensor scenarios; (ii) a tunable filter core capable of real-time reconfiguration within 10–50 microseconds, enabling rapid adaptation to channel dynamics without interrupting amplification; (iii) resilience of SNR to supply and temperature variations within a ±5% and 40°C range, respectively, attributable to adaptive biasing and robust layout techniques; (iv) a reproducible methodology for trading off filter selectivity against power consumption, expressed as an explicit design curve for different IoT sensing applications. The study contributes to knowledge by presenting a cohesive design framework for integrating a reconfigurable filter core into a low-power edge amplifier, including an explicit power-performance trade-off model, a hardware-software co-design workflow for firmware-driven reconfiguration, and a validated 65-nm CMOS prototype with multi-channel capability. The research outcomes provide practical guidance for engineers developing energy-aware IoT nodes in domains such as environmental monitoring, industrial automation, and wearable sensing, where spectral shaping and power budgets are critical. The main conclusion anticipates that the proposed RFFC architecture offers a scalable path to achieving flexible, energy-efficient edge signal processing without compromising data fidelity. Recommendations include extending the filter core to support adaptive beamforming in sensor arrays, exploring sub-threshold operation strategies for ultra-low-power regimes, and integrating on-chip machine learning-based control to autonomously optimize filter settings in response to environmental context.